Ashish Kumar
Ph.D. Electrical Engineering Department
PhD (V Year I Semester)
CGPA: 9.000/10.000

Research Scholar at EED IITR. Working in the area of Smart Grid Communication and Protection.


Smart Grid Communication
Power System Protection
FPGA/SoC Prototyping
Real-time Hardware-in-loop Testing


Director's Medal for securing the highest Grade Point in M.Tech. examination.

Previous Education

M.Tech. - Postgraduate (PG) in Engineering Systems
Dayalbagh Educational Institute, Deemed University, Agra, 2019
CGPA: 9.590
B.Tech. - Graduate (UG) in Electrical Engineering
Gurukula Kangri Vishwavidyalaya, Haridwar, 2016
Percentage: 72.47%
XII - Intermediate (Class XII) in Science (PCM)
Kendriya Vidyalaya Pitampura, New Delhi (CBSE), 2012
Percentage: 79.20%
X - Matriculate (Class X) in
Kendriya Vidyalaya Pitampura, New Delhi (CBSE), 2010
CGPA: 9.200

Work Experiences

Junior Research Fellow at Indian Institute of Technology, Roorkee
Jun 2019 to Jun 2021

Carried out FPGA-based IPs development for enabling real-time data acquisition from RTDS and to implement Ethernet based communication.

Senior Research Fellow at Indian Institute of Technology, Roorkee
Jul 2021 to Dec 2021

Carried out implementation of IEC 61850 SV and GOOSE decoding and encoding respectively over FPGA, backed by HSR/PRP for enhanced reliability.

Research Embedded Design Engineer Intern at Sapiient Advanced Technologies, Sydney
19th Aug 2022 to 20th Aug 2023

Sapiient Advanced Technologies is a startup based in Sydney, Australia focusing on Autonomous Underwater Vehicle (AUV) development using AI and embedded capabilities for underwater hull inspection. The internship role involved implementation of base hardware design on FPGA and microprocessor using Vivado and Petalinux to connect, capture, and analyze simulated/real-time data feeds from multiple sensors mounted on AUV.


Comparative Analysis of Metaheuristic Algorithms for the Implementation of Photovoltaic Solar Panel Model in MATLAB/Simulink by Ashish Kumar, D. Bhagwan Das

Published by Springer, Singapore in 2021

Journal: Advances in Systems Engineering. Lecture Notes in Mechanical Engineering.
Novel SVM based Islanding Detection Technique for Microgrid with Load Uncertainties by Pravin Kumar; Ashish Kumar; P Praveen; Barjeev Tyagi; Vishal Kumar

Published by IEEE in 2022

Journal: 2022 IEEE IAS Global Conference on Emerging Technologies (GlobConET)


Dr. Vishal Kumar

Professor, Indian Institute of Technology, Roorkee

Mr. Sergio Martins

Co-Founder, Sapiient Advanced Technologies, Sydney, Australia

Dr. D. Bhagwan Das

Professor, Dayalbagh Educational Institute, Deemed University, Agra


Computer Languages

Verilog, C, C++, MATLAB scripting

Software Packages

Vivado, Vitis, Petalinux, System Generator, RSCAD, Simulink HDL coder

Additional Courses

1. Design of photovoltaic systems, by IISc Bangalore through NPTEL (Nov. 2018) || 2. Hardware modeling using Verilog, by IIT Kharagpur through NPTEL (Nov. 2018) || 3. Rooftop Solar Photovoltaic Entrepreneurship Program, by AMU Aligarh through NSDC (Apr. 2019) || 4. FPGA Architecture and Programming using Verilog HDL, by NIELIT Calicut and ARM Education through NPTEL+ (Nov. 2022)

Spoken Languages

Hindi, English, Sanskrit, Urdu

Last Published on: 18 November 2023, 16:53:34